Introducing the ROCm Handbooks#
Documentation is organized by topic. Learning follows a sequence.
The documentation for the AMD ROCm™ platform is organized by component. Each component documents itself: the HIP documentation, for example, explains the basics of GPU programming with clear concepts and small tutorials, right next to its API reference. From the ROCm documentation landing page, every component is only a few clicks away.
The ROCm handbooks bring a book-style format to ROCm: they draw on the documentation of several components, arrange the material along one learning path, and complement the official documentation. In this blog, you’ll meet the two ROCm handbooks, see what each volume covers, and find out which one to open first, whether you’re writing your first HIP kernel or tuning one for a specific AMD GPU architecture.
What the ROCm Handbooks Are#
The ROCm handbooks target developers who require a unified, book-style reference for ROCm and HIP. They aggregate documentation from the ROCm portal and organize it into a structured format optimized for in-depth study and offline access, available in both PDF and HTML.
Each handbook collects the relevant pages from the documentation portal, adds chapters written specifically for the book, and arranges everything along a learning path.
The handbooks release together with ROCm. When a new ROCm version ships, the matching handbook versions ship with it, so the content you read matches the software you install.
The series currently has two volumes:
The AMD ROCm Programming Guide teaches HIP from the basics. It’s the first entry in the series and has been available since November 2025.
The AMD ROCm Optimization Guide teaches you how to make HIP code fast on AMD GPUs. It’s the second volume in the series, published in October 2026.
AMD ROCm Programming Guide#
The AMD ROCm Programming Guide is for developers who are new to ROCm and HIP. You should be comfortable with programming in general and with C++ in particular.
The guide introduces the core concepts, APIs, and recommended practices of HIP. Its examples run on any AMD GPU that the ROCm platform supports, from AMD Radeon™ GPUs in workstations to AMD Instinct™ GPUs in data centers. The guide has four parts:
Getting started explains what ROCm and HIP are, introduces the parallel programming model, and shows how HIP maps onto the GPU hardware. It ends with a tutorial that walks you through your first complete HIP program.
Core HIP programming covers the HIP C++ language extensions and the HIP runtime API: initialization, memory management, error handling, streams and asynchronous execution, cooperative groups, HIP graphs, and interoperability with graphics APIs. The memory management chapter alone spans host, device, unified, and virtual memory as well as the stream-ordered allocator. Five tutorials then apply this knowledge to common programming patterns: matrix multiplication, histograms with atomic operations, k-means clustering across CPU and GPU, stencil operations, and a breadth-first search that chains multiple kernels. The part closes with an overview of the available HIP compilers.
Performance optimization introduces you to tuning. Three tutorials take an image gamma correction kernel and a matrix transpose and improve them step by step, using grid-stride loops and tiling.
ROCm platform covers installing ROCm, the ROCm Runfile Installer, building ROCm from source, and third-party tools.
AMD ROCm Optimization Guide#
The AMD ROCm Optimization Guide continues where the Programming Guide ends. It’s for experienced ROCm and HIP programmers, for AI developers who work on low-level implementations and optimizations, and for anyone with existing HIP code that needs to be optimized for AMD GPUs. You should know how to launch kernels, index threads, and manage device memory.
The guide starts from one principle: profile first. You measure where your application spends its time, and only then do you apply targeted optimizations. The guide has three parts:
Getting started explains the fundamentals of GPU performance on AMD hardware and collects general performance guidelines for memory access and thread organization. A chapter on multi-GPU programming covers device selection, synchronization, and memory handling across several GPUs.
Performance optimization patterns form the core of the guide. Each pattern is a complete optimization journey for one fundamental algorithm. You start with a naive implementation that works, then apply one optimization at a time. For most steps, the guide lists the profiler counters to watch, so you can measure the effect on your own GPU. The three patterns build on each other:
Reduction introduces the fundamentals: avoiding thread divergence, resolving bank conflicts in the Local Data Share (LDS), performing reductions within a wavefront, and vectorizing memory loads.
Histogram adds concurrent updates. You move from atomic operations in global memory to atomics in LDS and finally to per-block partial histograms that a second kernel merges.
Matrix multiplication combines everything in seven steps on 4096 x 4096 single-precision matrices. After a naive baseline, six optimizations follow: tiling in LDS, register tiling, double buffering, vectorized loads, tuning register pressure with
__launch_bounds__, and finally a generic, policy-based kernel template that dispatches by GPU architecture.
The patterns use standard HIP only, so they run on any GPU architecture that ROCm supports, unless a step shows architecture-specific functionality.
Compiler builtins give you direct access to GPU instructions that the compiler doesn’t always generate on its own. This part is both a reference and a how-to guide, organized by architecture:
Cross-architecture builtins cover arithmetic (sum of absolute differences, integer and floating-point dot products, conversion and packing), direct loads from global memory into LDS, and wavefront operations: shuffles, Data Parallel Primitives (DPP), lane permutations, reductions, and votes.
Matrix Fused Multiply-Add (MFMA) builtins cover the matrix instructions of the CDNA™ architectures, from AMD Instinct MI100 GPUs (CDNA) to the AMD Instinct MI350 Series (CDNA 4), in dense and sparse variants.
Wave-Matrix Multiply-Accumulate (WMMA) builtins cover the matrix instructions of the RDNA™ 3 and RDNA 4 architectures: dense variants on both, plus sparse variants and transpose loads on RDNA 4.
Each matrix chapter for a specific architecture includes a worked example: it plugs that architecture’s MFMA or WMMA instructions into the generic matrix multiplication kernel from the patterns part. The introduction to the builtins also discusses their cost.
Where to Start#
Your starting point depends on your experience:
You’re new to HIP. Start with the AMD ROCm Programming Guide. Read Getting started and the SAXPY tutorial, then work through Core HIP programming. The programming-pattern tutorials show you how the pieces fit together.
You’re already writing HIP code. Skim the parts of the Programming Guide that are new to you, then move to the AMD ROCm Optimization Guide. Work through the patterns in order: reduction, histogram, matrix multiplication.
You’re tuning compute-bound kernels on AMD Instinct or AMD Radeon GPUs. Go to the compiler builtins in the Optimization Guide and pick the chapter for your architecture.
The two volumes complement each other. The Programming Guide points you to the Optimization Guide for profiling-driven optimization patterns and multi-GPU programming. The Optimization Guide assumes familiarity with the HIP basics covered in the Programming Guide: kernel launches, thread indexing, and memory management.
Get the Handbooks#
Both handbooks are available in HTML and PDF formats:
Handbook |
HTML |
|
|---|---|---|
AMD ROCm Programming Guide |
||
AMD ROCm Optimization Guide |
The sources live on GitHub in the AMD ROCm Programming Guide repository and the AMD ROCm Optimization Guide repository. If you find a mistake or a missing topic, open an issue in the respective repository. The example code is in the ROCm examples repository.
Summary#
In this blog, you learned that the ROCm handbooks turn the ROCm documentation into books that you can read from cover to cover. You saw that the AMD ROCm Programming Guide takes you from your first kernel to the HIP runtime API, and that the AMD ROCm Optimization Guide teaches you to profile, to optimize three fundamental algorithms step by step, and to use compiler builtins and matrix instructions on AMD Instinct and AMD Radeon GPUs. Both come as HTML and PDF, and both are released alongside ROCm.
Pick the volume that matches your experience, download the PDF, and start reading. Once you know your way around, the documentation of each component is there for the details. Because the handbooks ship with every ROCm release, come back with each new version to see what has changed in the books and in the software they describe.
Disclaimers#
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