Ashish Sirasao

ASHISH SIRASAO is a Corporate Vice President at AMD. His research interests include hardware–software co-design, programming paradigms for domain-specific accelerators, and deep-learning algorithms. He received his M.Tech degree in electrical engineering from IIT Mumbai.

Posts by Ashish Sirasao

February 17, 2026

Advanced MXFP4 Quantization: Combining Fine-Tuned Rotations with SmoothQuant for Near-Lossless Compression

Showcase advanced algorithms available in AMD Quark for efficient MXFP4 quantization on AMD Instinct accelerators with high accuracy retention.

https://rocm.blogs.amd.com/software-tools-optimization/mxfp4-online-rotation/README.html

November 05, 2025

Day 0 Developer Guide: hipBLASLt Offline GEMM Tuning Script

Learn how to improve model performance with hipBLASLt offline tuning in our easy-to-use Day 0 tool for developers to optimize GEMM efficiency

https://rocm.blogs.amd.com/artificial-intelligence/hipblaslt_offline_tuning/README.html

October 29, 2025

High-Accuracy MXFP4, MXFP6, and Mixed-Precision Models on AMD GPUs

Learn to leverage AMD Quark for efficient MXFP4/MXFP6 quantization on AMD Instinct accelerators with high accuracy retention.

https://rocm.blogs.amd.com/software-tools-optimization/mxfp4-mxfp6-quantization/README.html

August 26, 2025

QuickReduce: Up to 3x Faster All-reduce for vLLM and SGLang

Quick Reduce speeds up LLM inference on AMD Instinct™ MI300X GPUs with inline-compressed all-reduce, cutting comms overhead by up to 3×

https://rocm.blogs.amd.com/artificial-intelligence/quick-reduce/README.html